Signal Delay with digital input pods

Hi,

I am doing measurements on a full bridge converter and I am monitoring the PWM signals (4 primary MOSFETs, 2 secondary MOSFETs, 2 internal signals) with two digital input pods. Signals A through D are connected to Pod 1, Signals E, F, CMP and DBG are connected to Pod 2.
I noticed that the two Pods have different delay times. For example, see attached picture, the falling edges of PWMs A and F are programmed to occur simultaneously, for confirmation I also show them on the two analog channels. However, between the digital versions of the two signals there is a delay of approx. 50 ns, which is too much when investigating the dead times and other digital timings.
In the settings I only managed to set the alignment for all digital channels together, not the individual Pods.

Am I overseeing a setting somewhere?
Or is there another way around it?

Regards
Alex

P.S. when using the "attach images" function my image gets scaled down quite a bit, I'm also attaching the image in full resolution as a file.

Hi, I am doing measurements on a full bridge converter and I am monitoring the PWM signals (4 primary MOSFETs, 2 secondary MOSFETs, 2 internal signals) with two digital input pods. Signals A through D are connected to Pod 1, Signals E, F, CMP and DBG are connected to Pod 2. I noticed that the two Pods have different delay times. For example, see attached picture, the falling edges of PWMs A and F are programmed to occur simultaneously, for confirmation I also show them on the two analog channels. However, between the digital versions of the two signals there is a delay of approx. 50 ns, which is too much when investigating the dead times and other digital timings. In the settings I only managed to set the alignment for all digital channels together, not the individual Pods. Am I overseeing a setting somewhere? Or is there another way around it? Regards Alex P.S. when using the "attach images" function my image gets scaled down quite a bit, I'm also attaching the image in full resolution as a file.

Hi Alex,
We have been doing a bit of work to improve alignment. While it is not where we would like it to be it is greatly improved in our latest firmware, 7663. It is important that all leads and probes are the ones supplied. At this stage you are unable to time adjust the pods separately.

Ultimately we want to have a calibrator that will automatically align all inputs but it is not there yet.
Here is the result with 7663 where the variance is all within the rise time of 8ns (Channel 5 is the digital out of a CS1302 which all inputs are connected to).

Regards, Roger

Hi Alex, We have been doing a bit of work to improve alignment. While it is not where we would like it to be it is greatly improved in our latest firmware, 7663. It is important that all leads and probes are the ones supplied. At this stage you are unable to time adjust the pods separately. Ultimately we want to have a calibrator that will automatically align all inputs but it is not there yet. Here is the result with 7663 where the variance is all within the rise time of 8ns (Channel 5 is the digital out of a CS1302 which all inputs are connected to). Regards, Roger

Hi Roger,

I updated the CS to FW version 7663 and the delay times are much better now, I'm getting similar results as you even though my PWM signals have more variance in the timing of the edge.
Thanks for your help!

Regards
Alex

Hi Roger, I updated the CS to FW version 7663 and the delay times are much better now, I'm getting similar results as you even though my PWM signals have more variance in the timing of the edge. Thanks for your help! Regards Alex

Hi Alex,
I'm interested in the 10ns delay you are seeing between digital inputs A and F. I have some thoughts, but a question:
1. What signals are Digital A and F responding to? Are they the same signal?

Thoughts:
1. The PWM outputs using pulse builder have a deliberately different base clock than the 2ns ADC capture clock. The Pulse builder time base is 300 MHz, or 3.33ns per clock. This means that when repetitive capture is used, the pulse builder output is not stationary on the ADC sample points. This leads to variance of the pulse builder pulse output to the ADC sample point. Currently repetitive sampling works above 1 MHz, but we have a plan to introduce it for repeating pulse builder outputs because we know exactly at what time the pulse trains starts. This would give 50 ps or so resolution on the sample points.
All the same this may not be what you want. Would it suit you better if the PWM was a sub-multiple of the ADC sample inteval (eg 4ns).

2. I noted that you are comparing timing between two pods. Where you need best accuracy, it is better to compare timing using signals going to the same pod. There are two chips in the way for each input:
ISOW7844FDWE - isolated 4 input receiver.
a. Using the 3V3 input, 3V3 output setup there is a max 4.5ns part to part skew.
b. Further, there is pulse width distortion, based on the modulation method, of typ 0.6 ns, but 4.4ns max.
So with two different devices, with different modulation clocks, it is possible, worst case, to have 4.5 + 4.4 = 8.9ns difference in the outputs.
c. The channel to channel max skew is 2.2ns, so better to have important time related signals on the same pod.
DSLVDS1047 - differential transmitter
a. Part to part skew is 1ns max, so maybe 9.9ns between two pods
b. Note that there is a lo-> hi and hi->lo skew of a maximum 0.4ns.

So I guess this is saying that it is possible to see what you are seeing because the signals are measured between two pods.

I also note that the decay rates between the two analog signals are different, and if the two digitals are each based on one of these signals that will also make them different.

All of this is because we are supporting isolated inputs!

I hope this helps.

Hi Alex, I'm interested in the 10ns delay you are seeing between digital inputs A and F. I have some thoughts, but a question: 1. What signals are Digital A and F responding to? Are they the same signal? Thoughts: 1. The PWM outputs using pulse builder have a deliberately different base clock than the 2ns ADC capture clock. The Pulse builder time base is 300 MHz, or 3.33ns per clock. This means that when repetitive capture is used, the pulse builder output is not stationary on the ADC sample points. This leads to variance of the pulse builder pulse output to the ADC sample point. Currently repetitive sampling works above 1 MHz, but we have a plan to introduce it for repeating pulse builder outputs because we know exactly at what time the pulse trains starts. This would give 50 ps or so resolution on the sample points. All the same this may not be what you want. Would it suit you better if the PWM was a sub-multiple of the ADC sample inteval (eg 4ns). 2. I noted that you are comparing timing between two pods. Where you need best accuracy, it is better to compare timing using signals going to the same pod. There are two chips in the way for each input: ISOW7844FDWE - isolated 4 input receiver. a. Using the 3V3 input, 3V3 output setup there is a max 4.5ns part to part skew. b. Further, there is pulse width distortion, based on the modulation method, of typ 0.6 ns, but 4.4ns max. So with two different devices, with different modulation clocks, it is possible, worst case, to have 4.5 + 4.4 = 8.9ns difference in the outputs. c. The channel to channel max skew is 2.2ns, so better to have important time related signals on the same pod. DSLVDS1047 - differential transmitter a. Part to part skew is 1ns max, so maybe 9.9ns between two pods b. Note that there is a lo-> hi and hi->lo skew of a maximum 0.4ns. So I guess this is saying that it is possible to see what you are seeing because the signals are measured between two pods. I also note that the decay rates between the two analog signals are different, and if the two digitals are each based on one of these signals that will also make them different. All of this is because we are supporting isolated inputs! I hope this helps.

Hi Bart,

thanks for the detailed information.
Regarding your question: No, those are not physically the same signals. They are PWM signals created by a microcontroller to control a full bridge converter. Ideally, they _should_ be the same, but as you have already seen on the analog signals (the labels are wrong by the way, Channel A is PWM A, Channel B is PWM F), the decay times are different, already in the order of magnitude of the difference in the digital signal (with the new firmware), so I don't see any problem with that at the moment.

I haven't really used the pulse builder extensively yet, but it's a very practical function and I will certainly have use for it in the future.

I have already assumed that for maximum accuracy I should compare critical digital signals only from the same pod. Thanks for the interesting information though.

Very happy with the scope and the support so far, thanks for your help!

Greetings from Germany
Alex

Hi Bart, thanks for the detailed information. Regarding your question: No, those are not physically the same signals. They are PWM signals created by a microcontroller to control a full bridge converter. Ideally, they _should_ be the same, but as you have already seen on the analog signals (the labels are wrong by the way, Channel A is PWM A, Channel B is PWM F), the decay times are different, already in the order of magnitude of the difference in the digital signal (with the new firmware), so I don't see any problem with that at the moment. I haven't really used the pulse builder extensively yet, but it's a very practical function and I will certainly have use for it in the future. I have already assumed that for maximum accuracy I should compare critical digital signals only from the same pod. Thanks for the interesting information though. Very happy with the scope and the support so far, thanks for your help! Greetings from Germany Alex