Plugin ADC Choices

It would be a great feature to see ADC resolution choices (modules) ie 16bit ADC for low frequency high resolution sampling for audio applications and then switch modules to 8bit for high speed low resolution sampling.

It would be a great feature to see ADC resolution choices (modules) ie 16bit ADC for low frequency high resolution sampling for audio applications and then switch modules to 8bit for high speed low resolution sampling.

This is a nice idea, but tricky in execution. First it means the user opening the box, and we like to minimize that to reduce mistakes. Second it means connectors in high speed data paths. The transition time of the ADC outputs have to be less than 2 ns to ensure our timing model is met. As soon as you add in the inductance and length of a connector and seperate board this is hard to do. The longer signal/ground loops also increase the possibility of noise injection. The increased possibility of ringing on the clock signal means increased uncertainty in the clock switch transition, which is effectively jitter in the sample position, which reduces the SFDR. Right now we can see so many technical difficulties we will leave it for another time.

This is a nice idea, but tricky in execution. First it means the user opening the box, and we like to minimize that to reduce mistakes. Second it means connectors in high speed data paths. The transition time of the ADC outputs have to be less than 2 ns to ensure our timing model is met. As soon as you add in the inductance and length of a connector and seperate board this is hard to do. The longer signal/ground loops also increase the possibility of noise injection. The increased possibility of ringing on the clock signal means increased uncertainty in the clock switch transition, which is effectively jitter in the sample position, which reduces the SFDR. Right now we can see so many technical difficulties we will leave it for another time.

other adc resolutions : possibility of using 'digital inputs' for external ad converters with serial communication? ( 2 separate/or 1 common/ clock + 2 /or 3/ data streams using 4 lines)

other adc resolutions : possibility of using 'digital inputs' for external ad converters with serial communication? ( 2 separate/or 1 common/ clock + 2 /or 3/ data streams using 4 lines)